Programmable Logic and Asic Xilinx launches 20nm device with 50 million gates

Programmable Logic and Asic Xilinx launches 20nm device with 50 million gates

2013/12/10

Xilinx has announced its largest FPGA, a 4.4 million logic cell device.

The Virtex UltraScale VU440 is a 20nm device. It delivers 50 million equivalent Asic gates for next generation production and prototyping applications.

It has the bandwidth for single chip implementations of 400G MuxSAR, 400G Transponder and 400G MAC-to Interlaken bridge applications.

The UltraScale architecture is designed to provide up to 90% utilisation featuring next generation routing, ASIC-like clocking, power management, elimination of interconnect bottlenecks, and critical path optimizations.

The programmable architecture has wider multipliers, high speed memory cascading, 33G capable transceivers, and the addition of 100Gb/s Ethernet MAC and 150Gb/s Interlaken IP cores, said the supplier.

Xilinx UltraScale devices are supported in the Vivado Design Suite 2013.4 release and full product documentation is now available.

V irtex UltraScale devices will begin shipping in the first half of 2014.

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